SSM3J56MFV 2014-03-01 1 toshiba field-effect transistor silicon p-chan nel mos type (u-mos ) SSM3J56MFV load switching applications ? 1.2 v drive ? low on-resistance: r ds(on) = 390 m ? (max) (@v gs = -4.5 v) r ds(on) = 480 m ? (max) (@v gs = -2.5 v) r ds(on) = 660 m ? (max) (@v gs = -1.8 v) r ds(on) = 900 m ? (max) (@v gs = -1.5 v) r ds(on) = 4000 m ? (max) (@v gs = -1.2 v) absolute maximum ratings (ta = 25c) characteristic symbol rating unit drain-source voltage v dss -20 v gate-source voltage v gss 8 v dc i d (note 1) -800 drain current pulse i dp (note 1) -1600 ma p d (note 2) 150 p d (note 3) 500 power dissipation t < 5s 800 mw channel temperature t ch 150 c storage temperature range t stg ?55 to 150 c note: using continuously under heavy l oads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability si gnificantly even if the operating conditions (i.e. operati ng temperature/current/voltage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?h andling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: the channel temperature should not exceed 150 c during use. note 2: mounted on a fr4 board. (25.4 mm 25.4 mm 1.6 mm, cu pad: 0.585 mm 2 ) note 3: mounted on a fr4 board. (25.4 mm 25.4 mm 1.6 mm, cu pad: 645 mm 2 ) marking equivalent circuit (top view) handling precaution when handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. thermal resistance r th (ch-a) and power dissipation p d vary depending on board material, board area, board thickness and pad area. when using this device, please ta ke heat dissipation into consideration. unit: mm jedec D jeita D toshiba 2-1l1b weight: 1.5mg (typ.) pw 1 2 3 1 2 3 1.gate 2.source 3.drain vesm start of commercial production 2011-05
SSM3J56MFV 2014-03-01 2 electrical characteristics (ta = 25c) characteristic symbol test conditions min typ. max unit v (br) dss i d = -1 ma, v gs = 0 v -20 ? ? v drain-source breakdown voltage v (br) dsx i d = -1 ma, v gs = 5 v . (note 5) -15 ? ? v drain cut-off current i dss v ds = -20 v, v gs = 0 v ? ? -1 a gate leakage current i gss v gs = 8 v, v ds = 0 v ? ? 1 a gate threshold voltage v th v ds = -3 v, i d = -1 ma -0.3 ? -1.0 v forward transfer admittance ? y fs ? v ds = -3 v, i d = -100 ma (note 4) 0.5 1.0 ? s i d = -800 ma, v gs = -4.5 v (note 4) ? 310 390 i d = -500 ma, v gs = -2.5 v (note 4) ? 380 480 i d = -200 ma, v gs = -1.8 v (note 4) ? 470 660 i d = -100 ma, v gs = -1.5 v (note 4) ? 560 900 drain?source on-resistance r ds (on) i d = -10 ma, v gs = -1.2 v (note 4) ? 770 4000 m input capacitance c iss ? 100 ? output capacitance c oss ? 16 ? reverse transfer capacitance c rss v ds = -10 v, v gs = 0 v, f = 1 mhz ? 10 ? pf turn-on time t on ? 8 ? switching time turn-off time t off v dd = -10 v, i d = -200 ma v gs = 0 to -2.5 v, r g = 50 ? 26 ? ns total gate charge q g ? 1.6 ? gate-source charge q gs1 ? 0.2 ? gate-drain charge q gd v dd = -10 v, i d = -800 ma, v gs = -4.5 v ? 0.4 ? nc drain-source forward voltage v dsf i d = 800 ma, v gs = 0 v (note 4) ? 0.9 1.2 v note 4: pulse test note 5: if a forward bias is applied between gate and source, this device enters v(br)dsx mode. note that the drain-source breakdown voltage is lowered in this mode. switching time test circuit (a) test circuit (b) v in notice on usage v th can be expressed as the voltage between gate and sour ce when the low operating current value is i d = -1 ma for this product. for normal switching operation, v gs (on) requires a higher voltage than v th and v gs (off) requires a lower voltage than v th. (the relationship can be established as follows: v gs (off) < v th < v gs (on). ) take this into consideration when using the device. (c) v out v dd = -10 v r g = 50 duty 1% v in : t r , t f < 5 ns common source ta = 25c in 0 ? 2.5v 10 s v dd out r g r l t on 10% 90% ?2.5 v 0 v 90% 10% t off t r t f v ds ( on ) v dd
SSM3J56MFV 2014-03-01 3 gate?source voltage v gs (v) i d ? v gs drain current i d (a) -10 0 -0.1 -1 -0.001 -0.01 -0.0001 common source v ds = -3 v pulse test ambient temperature ta (c) r ds (on) ? ta drain?source on-resistance r ds (on) ( ? ) ? 50 0 50 150 100 drain?source voltage v ds (v) i d ? v ds drain current i d (a) 0 0 -0.5 -1.0 -1.5 common source ta = 25 c pulse test drain?source on-resistance r ds (on) ( ? ) 0 -2 -4 -6 gate?source voltage v gs (v) 0 r ds (on) ? v gs -8 i d = -10 ma common source pulse test r ds (on) ? i d drain current i d (a) drain?source on-resistance r ds (on) ( ? ) -1.5 -1.0 -1.8 v v gs = -1.2 v -2.5 v -2.0 -4.5 v -2.0 -1.0 -25 c ta = 100 c 25 c 1.2 -25 c 25 c 1.6 ta = 100 c 0.8 -2.0 0 -1.0 0 -1.5 1.6 0.4 0.8 v gs = -4.5 v -1.5 v -2.5 v -1.8 v -0.5 common source ta = 25 c pulse test 0 1.6 0.4 i d = -800 ma / v gs = -4.5 v -10 ma / -1.2 v -500 ma / -2.5 v -200 ma / -1.8 v 1.2 common source pulse test -0.5 -1.5 v 0.4 12 -1.2 v drain?source on-resistance r ds (on) ( ? ) 0 -2 -4 -6 gate?source voltage v gs (v) 0 r ds (on) ? v gs -8 i d = -800 ma common source pulse test 1.2 -25 c 25 c 1.6 ta = 100 c 0.8 0.4 -100 ma / -1.5 v 0.8
SSM3J56MFV 2014-03-01 4 drain current i d (a) forward transfer admittance ? y fs ? (s) |y fs | ? i d -10 -0.01 -0.1 -0.001 ambient temperature ta (c) v th ? ta gate threshold voltage v th (v) -1.0 0 ? 50 0 150 -0.5 50 100 drain reverse current i dr (a) drain?source voltage v ds (v) i dr ? v ds 10 0 0.1 1 0.001 0.01 0.5 1.0 1.5 common source v gs = 0 v pulse test g d s i dr drain?source voltage v ds (v) c ? v ds capacitance c (pf) -0.1 -1 -10 -100 total gate charge qg (nc) dynamic input characteristic gate?source voltage v gs (v) 0 0 -4 -8 -6 -2 drain current i d (a) switching time t (ns) t ? i d 1 -0.01 100 -0.1 1000 -1 -10 10 common source v ds = -3 v i d = -1 ma 0.01 1 10 3 0.3 -25 c ta =100 c 25 c 1 100 1000 300 30 c iss t f t off t r t on common source v dd = -10 v v gs = 0 to -2.5 v ta = 25 c r g = 50 3 4 1 2 vdd = - 16 v vdd = - 10 v common source i d = -800 ma ta = 2 5 c common source v ds = -3 v ta = 25c pulse test 0.1 0.03 common source ta = 25c f = 1 mhz v gs = 0 v 10 3 c oss c rss -1
SSM3J56MFV 2014-03-01 5 drain power dissipation p d (mw) ambient temperature ta (c) p d ? ta 0 200 0 100 50 600 500 300 100 400 0.001 1000 0.01 0.1 1 100 10 1000 1 10 transient thermal impedance r th (c/w) 100 single pulse a: mounted on fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 645 mm 2 ) b: mounted on fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 0.585 mm 2 ) pulse width t w (s) r th ? t w 150 a: mounted on fr4 board (25.4mm 25.4mm 1.6mm, cu pad : 645 mm 2 ) b: mounted on fr4 board (25.4mm 25.4mm 1.6mm, cu pad : 0.585 mm 2 ) a a b b
SSM3J56MFV 2014-03-01 6 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted fo r use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific appl ications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used f or automobiles, trains, ships and other transportation, traffic si gnaling equipment, equipment used to control combustions or expl osions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is pres ented only as guidance for product use. no re sponsibility is assumed by toshiba for an y infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provid ed in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability wh atsoever, including without limitation, indirect, co nsequential, special, or incidental damages or loss, including without limitation, loss of profit s, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? 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